1. Field of the Invention
The present invention relates to a method for forming film a film forming apparatus, and a thin film structure for use in the Chemical Vapor Deposition (CVD) method used in the process of forming a thin film with a high dielectric constant, such as is required in a semiconductor memory.
2. Description of the Related Art
In recent years, rapid progress has been made in the integration of semiconductor memories or devices and, particularly, with respect to dynamic random access memories (DRAMs). In DRAMs, for example, the progress in integration has been so rapid that the number of bits has quadrupled in only three years, even against the background of the increasing needs of the highly integrated device (e.g., reduced power consumption and cost).
No matter how much integration may be improved, however, it remains true that the capacitor forming a memory cell of a DRAM must have a sufficient capacity. To produce such a capacitor, it is necessary to make a thin film of capacitor material. There exists, however, a current limit as to the minimum thinness achievable with a capacitor material film, such as SiO.sub.2.
A sufficient capacity may also be secured, in the same manner as thinning the film, by increasing the dielectric constant of the capacitor material through variation of the material itself. In view of the limit on thinness, and with an eye toward increasing the dielectric constant of the capacitor material, research and development into utilizing a material with a high dielectric constant in a memory device has been increasingly popular in this technical field.
In terms of the performance required of such a capacitor material, what is most important is that a film be thin and have a high dielectric constant, as mentioned above, and that the leakage current be small. That is, in employing any material with a high dielectric constant, the material must be made as thin as possible, and the leakage current therefrom must be minimized. It is generally desired, as a rough development target, that the film thickness be 0.6 nm or less, as calculated in terms of SiO.sub.2, and that the leak current density be 2.times.10.sup.-7 A/cm.sup.2 or less when IV is applied.
In forming a thin film on an electrode for a stepped DRAM capacitor, a CVD method suitable for deposition on an object of such a complicated shape is most advantageous. A serious problem, however, has hitherto existed in that there is no known material which has a stable and desirable vaporization characteristic which can be used as source material for CVD. This is mainly because the vaporization characteristic from heating a dipivaloylmethanato (DPM) compound of .beta.-diketone (popularly used as a CVD source material) is not always satisfactory.
In view of the foregoing circumstances, the inventors already have proposed a CVD source material for which the vaporization characteristic is remarkably improved. This improvement is accomplished by dissolving conventional solid source materials in an organic solvent called THF (Tetrahydrofuran: C.sub.4 H.sub.3 O) to obtain a solution. This method is disclosed in Japanese Patent Application No. Hei 4-289780.
A desirable result is not, however, always achieved merely by preparing a thin film having a high dielectric constant through employing the foregoing source materials when a conventional CVD apparatus for liquid source materials is used (e.g., an apparatus for forming SiO.sub.2 film). In response to this problem, the inventors have also proposed a CVD apparatus for liquid source materials which is capable of sufficiently vaporizing and feeding the liquid source materials. This apparatus is disclosed in Japanese Laid-Open Patent Publications (unexamined) Nos. Hei 6-310444 and Hei 7-94426.
The inventors have also proposed that coverage can be remarkably improved by changing Ti source material from the popularly employed TTIP Ti(O-i-Pr).sub.4 ! to DPM titanyl bis (dipivaloylmethanato) TiO (DPM).sub.2, being the same as Ba or Sr source material. As well, the inventors have discerned that a two-step deposition process can be very effective for obtaining a desirable surface contour, and a desirable electric characteristic, especially as compared with a single layer film. The two steps include a step of crystallizing an initial film (buffer layer) by annealing in the initial stage of film formation, when a relatively amorphous film is easily formed, and a step of depositing a second layer film (main layer). These advances are disclosed in the Japanese Laid-Open Patent Publication (unexamined) No. Hei 7-268634.
A problem still remains. Even when a high dielectric constant thin film is prepared by using the above-mentioned solution vaporizing CVD apparatus, a desirable level of stability (including electric characteristic stability) of the thin film is not always achieved. FIG. 1 is a schematic view of the solution vaporizing CVD apparatus shown in the Japanese Laid-Open Patent Publication (unexamined) No. Hei 7- 94426. In the drawing, a (Ba, Sr)TiO.sub.3 film is deposited by CVD. Reference numeral 21 designates a substrate, 23 designates a source material gas feed pipe, 24 is an oxidizing agent supply pipe, 31 is a vaporizer, 32 is a reaction chamber, 41 is a dilution gas pipe, 42 is a dilution gas amount regulator, 43 is a pressure pipe, 44 is a liquid source material container, 45 is a liquid source material feeder, 46 is a connection pipe, 47 is a pulverizing nozzle, 48 is a vaporizer heater, 49 is a vaporizing chamber, 50 is a raw material gas feed port, 51 is a feed pipe heater, 52 is a reaction chamber heating mechanism, and 53 is a substrate heater.
In the solution vaporization CVD apparatus of FIG. 1, a dilution gas N.sub.2 flows through the dilution gas pipe 41 and connection pipe 46, while the flow rate thereof is regulated by the dilution gas amount regulator 42. Solution source material in the liquid source material container 44 is fed from the pressure pipe 43, through the pulverizing nozzle 47, and into the flowing dilution gas, while being pressurized and controlled by the liquid source material feeder 45. It is then sprayed in the vaporizing chamber 49 of the vaporizer 31. The source material gas vaporized in the vaporizer is fed from the source material gas feed port 50, through the source material gas feed pipe 23, which is heated by the feed pipe heater 51, and to the reaction chamber 32. After reaction with an oxidant in the reaction chamber, a (Ba, Sr) TiO.sub.3 film is prepared on the substrate, which is heated by the substrate heater 53.
In the actual apparatus, three liquid source material feed systems (components 43 to 45, as shown in FIG. 1) are respectively provided for Ba, Sr and Ti, and the source materials are fed into one vaporizer. In the reaction chamber, the flow rate of the source materials and the film formation time are controlled under the following conditions: atmosphere of O.sub.2, pressure of 1 to 10 Torr, and temperature of 400.degree. to 600.degree. C. The temperature is relatively low because a low temperature provides better coverage. Thereby, a film is formed according to an established target of obtaining a (Ba, Sr) TiO.sub.3 film having a component ratio of (Ba+Sr)/Ti=1.0, and a film thickness of 300 .ANG. at a deposition rate of 30 .ANG./min.
When forming a (Ba, Sr) TiO.sub.3 film (BST film, hereafter) by a CVD method employing liquid source materials composed of any DPM organo-metallic compound dissolved in an organic solvent, even if a constant flow rate of the respective source materials (i.e., Ba, Sr, and Ti) is established, there is still the problem of heterogeneous, or uneven, distribution of the Ba, Sr and Ti components in the direction of film thickness. Also, there can be the mixture, or contamination, of the film with carbon, which eventually results in problems such as an unstable electric characteristic, a lowering of the dielectric constant, an increase in the leakage current, a decrease in the film's voltage resistance, etc.
The following section focuses on this problem of the heterogeneous component distribution of Ba, Sr, and Ti.
The conventional solution vaporizing CVD apparatus is constructed such that the DPM compounds containing Ba, Sr or Ti are each stored in different containers, and the supply thereof to the reactor is independently decided. During the deposition of a composite oxide film of those metallic elements on a substrate, the substrate is precisely kept at a certain temperature, within a range of 5.degree. C. or less, by heating a substrate support section with a resistance heater. However, when depositing a BST composite oxide film with this type of film forming apparatus, and with the substrate temperature kept at 420.degree. C., and with the component distribution of the metallic elements, in the film thickness direction, being measured by Auger Electron Spectroscopy (AES), a heterogeneous distribution (as shown in FIGS. 2 and 3) occurs. In each of FIGS. 2 and 3, the abscissa indicates the sputtering time for removing the film, and the ordinate indicates the height of a peak value representing the existence of each element.
FIG. 2 is a component distribution diagram obtained by AES, in the direction of film thickness, of the Ba, Sr, and Ti of a BST film formed via CVD (CVD-BST film, hereafter) for two minutes on a Ru electrode with a constant solution flow rate. The solution was obtained by dissolving solid Ba, Sr, and Ti source materials Ba(DPM).sub.2. Sr(DPM).sub.2 and TiO(DPM).sub.2 respectively in THF (Tetrahydrofuran: C.sub.4 H.sub.8 O), an organic solvent. In this film formation process, the deposition rate was about 30 .ANG./min, and the film thickness was about 60 .ANG.. FIG. 2 shows a trend that the nearer the Ru electrode, the Ti in the film increases, while the Ba and the Sr decrease. This trend, or phenomenon, takes place even though the flow rates of the respective source materials Ba, Sr, and Ti are constant. FIG. 3 shows another component distribution diagram, in the film thickness direction, of a CVD-BST film formed under the same conditions, but on a Pt electrode.
In the foregoing process for forming CVD-BST film, a problem exists in that the amount of the CVD-BST film formed is different, depending on the substrate material (hereinafter referred to as a dependency on the substrate). Even with a substrate made of plural materials and having a patterned surface, there is a the similar problem in that the amount of film formed is different from the amount formed on a single material substrate.
Another problem exists in that the surface temperature of the substrate 21 (see FIG. 1) changes due to the deterioration, etc. of a susceptor which holds the heater 53 and the substrate 21, making it impossible to form film under constant temperature conditions for an extended period of time.
Yet another problem exists in that it is impossible to perform a film formation constantly due to clogging, or the like, which occurs during the process of mixing any source material solution with a dilution gas, and supplying it to a vaporizer.
A further problem exists in that the leakage current is large in a thin film structure that is comprised of a conventional thin film having a high dielectric constant, and the electrodes that hold the thin film therebetween.
FIG. 4 is a sectional view showing a stacked capacitor for a DRAM which has a thin film of a high dielectric constant as the dielectric material. This arrangement is shown in Pierre C. Fazan. "Trends in the development of ULSI DRAM capacitors", Integrated Ferroelectrics 1994, Vol. 4, pp. 247-256. In FIG. 4, reference numeral 1 designates a silicon substrate; 33 is a cell plate made of platinum, for example; 34 is a film of high dielectric constant; 35 is a storage node made of platinum, for example; 37 is an interlayer insulating film made of silicon dioxide, for example; and 38 is a plug of polysilicon, for example, for electrically connecting the storage node to, for example, a transistor.
Applying the high dielectric constant film CVD to the practical formation of the capacitor shown in FIG. 4 involves the following steps: burying a polysilicon film by CVD in holes, formed by lithography and etching, on the interlayer insulating film 37; forming the plug 38 by removing a portion of the interlayer insulating film 37 deposited on the surface through full surface etching or a chemical mechanical polishing method (CMP method); forming the storage node 35, which is 200 nm in height, by a lithography and etching process of platinum film deposited by sputtering on the plug 38; coating the entire surface of the storage node 35 with the BST film 34, with a thickness of 30 nm, by a CVD method; and forming the cell plate 33 by depositing a platinum film through sputtering. In the capacitor thus formed, a voltage applied between the cell plate 33 and the storage node 35 causes a large electric charge to be stored on the upper and side faces of the storage node 35, due to the high dielectric constant (of about 200) of the BST film 34.
In the above case, in which CVD-BST film was applied to a conventional capacitor structure, when a voltage is applied between the cell plate 33 and the storage node 35, a large field strength is generated in the BST film near the storage node. This field strength is several times greater than the field strength in the remaining part of the BST film, and is due to field concentration. The field concentration results since the thickness of the BST film 34, amounting to 30 nm, is large when compared with the radius of curvature of the shoulder portion 36 of the storage node 35. The radius of curvature of the shoulder portion normally is only about 5 nm. Consequently, when a negative voltage is applied to the storage node, the leakage current due to the Schottky emission current from the storage node 35 increases considerably, making it impossible to hold the electric charge.
A similar field concentration appears also at a lower end 39 of the cell plate 33. Therefore, just as in the case of a negative voltage being applied to the cell plate 33, the leakage current due to Schottky emission current from the cell plate increases considerably, making it impossible to hold the electric charge.
Further, since the BST film 34 is 30 nm in thickness, which is large when compared with the storage node 35 being 200 nm in height, the cell plate 33 is not able to coat the entire side face of the storage node 35. As a result, the entire side face of the storage node 35 is not effectively utilized as electrode of the capacitor. A still further problem exists in that the potentials of adjacent storage nodes interfere with, or negatively affect, each other through the BST film in the cutout portion.